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Power Management

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Originally published in Queue vol. 8, no. 2
see this item in the ACM Digital Library



Andy Woods - Cooling the Data Center
What can be done to make cooling systems in data centers more energy efficient?

David J. Brown, Charles Reams - Toward Energy-Efficient Computing
What will it take to make server-side computing more energy efficient?

Eric Saxe - Power-Efficient Software
Power-manageable hardware can help save energy, but what can software developers do to address the problem?

Alexandra Fedorova, Juan Carlos Saez, Daniel Shelepov, Manuel Prieto - Maximizing Power Efficiency with Asymmetric Multicore Systems
Asymmetric multicore systems promise to use a lot less energy than conventional symmetric processors. How can we develop software that makes the most out of this potential?


(newest first)

Stuart Halliday | Wed, 03 Mar 2010 11:18:40 UTC

Excellent article.

I remember Sophie Wilson telling me years ago about the ARM chip development. "We wanted BASIC to run as fast on the ARM chip as machine code did on the 6502 in a BBC micro."

They succeed.

Avijit Dutta | Sat, 27 Feb 2010 17:08:59 UTC

sir, I am not ableto get the last point that how big parallel computers will be used to provide the platform for nueroscientist,psychologist to test their hypothesis. Please I am curious to know it. Actually really this is inspirational.

Hedley Rainnie | Fri, 26 Feb 2010 23:26:20 UTC

Actually, the Stanford Mips-X was produced. At my co we licensed that core (only 2 licensees IIT(us) and Mips Co). It was like cheap to license it. No schematics. So 6 months were spent reversing the layout that was never taped out by Stanford. Then those gates were taped out. Chip came back, and it was a rock. Subsequently we found the cache was DOA a disable a POR and it actually was passing vectors. Then we coded our own in schematic capture. Later still, added the missing byte and short load and stores. Later a variable shift was added. An enormous number of these exist, they are in ESS powered DVD players. Also Sipura and Komodo (later Cisco) VoIP adapters.

Hennessy stopped by our Co at one time (8x8 then) and I asked him "Why 2 delay slots after branches and jumps?" answer: "We were just trying that out"

I don't know if any of you looked at GCC for delay slot handling, but @2 Mips-X was alone and it broke GCC very badly having 2 delay slots needing filling.

Michael Elrick | Thu, 25 Feb 2010 22:47:18 UTC

Excellent. I'm a fan of Steve's work on the BBC Micro, later ARM PC's and it's exciting to hear about how he made do with few resources and this new massively parallel work. Inspirational.

Titanas | Thu, 25 Feb 2010 22:20:11 UTC

Fascinating stuff. IMHO the hypothesis of "more reliable when built on unreliable components" has been answered already by Google's techniques in building data centers using commodity hardware.

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