September/October 2018 issue of acmqueue The September/October issue of acmqueue is out now

Subscribers and ACM Professional members login here



Processors

  Download PDF version of this article PDF

Error 526 Ray ID: 47c045541c950ec1 • 2018-11-19 05:27:59 UTC

Invalid SSL certificate

You

Browser

Working
Newark

Cloudflare

Working
deliverybot.acm.org

Host

Error

What happened?

The origin web server does not have a valid SSL certificate.

What can I do?

If you're a visitor of this website:

Please try again in a few minutes.

If you're the owner of this website:

The SSL certificate presented by the server did not pass validation. This could indicate an expired SSL certificate or a certificate that does not include the requested domain name. Please contact your hosting provider to ensure that an up-to-date and valid SSL certificate issued by a Certificate Authority is configured for this domain name on the origin server. Additional troubleshooting information here.

acmqueue

Originally published in Queue vol. 11, no. 2
see this item in the ACM Digital Library


Tweet


Related:

Christoph Lameter - NUMA (Non-Uniform Memory Access): An Overview
NUMA becomes more common because memory controllers get close to execution units on microprocessors.


Bill Hsu, Marc Sosnick-Pérez - Realtime GPU Audio
Finite difference-based sound synthesis using graphics processors


Andrew Danowitz, Kyle Kelley, James Mao, John P. Stevenson, Mark Horowitz - CPU DB: Recording Microprocessor History
With this open database, you can mine microprocessor trends over the past 40 years.


Alexandra Fedorova, Sergey Blagodurov, Sergey Zhuravlev - Managing Contention for Shared Resources on Multicore Processors
Contention for caches, memory controllers, and interconnects can be alleviated by contention-aware scheduling algorithms.



Comments

(newest first)

Matthieu Wipliez | Tue, 01 Jul 2014 13:34:42 UTC

Hi there, you might find this interesting, at Synflow we're working on a new programming language that addresses the shortcomings of both HLS and Verilog/VHDL. It has a C-like syntax, but it is a language as a whole, which has many advantages over the "framework as a language" approach. Like Lime, it features explicit parallelism (tasks and hierarchical networks), except that it is cycle-accurate and bit-accurate. We've recently made the compiler and IDE open source, take a look at https://www.synflow.com


Yassen | Wed, 15 Jan 2014 14:48:02 UTC

Congratulations for the excellent article! I only want to comment on the "FUTURE DIRECTIONS" section where it is said that "The time is not far off when CPUs, GPUs, FPGAs, and other ASSPs will be integrated on the same chip." Well, manufacturers are already working hard and that time has come. For example Xilinx offers their Zynq-7000 All Programmable SoC with a dual core ARM Cortex A9 plus FPGA fabric in the same chip. Altera is also offering their Cyclone V SoC Hard Processor System with single or dual core ARM Cortex A9 and FPGA combined. Actel (now acquired by Microsemi) sells their SmartFusion2 SoC FPGAs with ARM Cortex M3 plus FPGA SOC. It is also worth noting that http://www.parallella.org/ tries to make parallel computing (or supercomputing) available to the masses with their Parallela board worth only 99$.


Mark | Wed, 27 Feb 2013 23:47:52 UTC

Victor,

I recently (~1 week ago) started learning about fpga. So far I have a simple but functional CPU. I'm blogging my progress at blog.mhc-online.co.uk/fpga. Please feel free to leave me a message via the blog and I'll be happy to share some pointers.

Mark


Kiran Kintali | Wed, 27 Feb 2013 14:55:03 UTC

Nice article. But references to HDLCoder (http://www.mathworks.com/products/hdl-coder) from MathWorks needs clarification than what is quoted in this article.

HDL Coder generates portable, synthesizable Verilog and VHDL code from any or combination of these modeling languages

1) MATLAB functions 2) Simulink models, and 3) Stateflow charts.

The generated HDL code can be used for FPGA programming or ASIC prototyping and design.


Sunil Shukla | Mon, 25 Feb 2013 16:40:14 UTC

Thanks to all of you for pointing the typos in the article. Those errors creeped in during the publication phase. The publishers have been contacted to correct those.


Antonio Roldao | Mon, 25 Feb 2013 15:21:59 UTC

This is one of the best papers I have read about FPGAs, and it reminds me a lot of one I wrote, almost 10 years ago, during my naïve undergraduate days:

http://anton.io/pub/fpga2005.pdf

/A.

[There's another minor oversight on Fig. 3 where the "bitstream generation" block should read (bitgen) instead of (trace).]


Viktor | Mon, 25 Feb 2013 13:28:17 UTC

Hi!

I'm very intersted in FPGA and its capabilities but I'm simple .net developer, I have no special knowledge about it (well, I'm actually read H&P book). Can anybody advice me learning materials to start with? Books, boards, sites, programs, etc..?

Thanks.


Leave this field empty

Post a Comment:







© 2018 ACM, Inc. All Rights Reserved.