July/August 2018 issue of acmqueue The July/August issue of acmqueue is out now
Subscribers and ACM Professional members login here



Concurrency

  Download PDF version of this article PDF

Error 526 Ray ID: 46d69fc98a6421a4 • 2018-10-21 20:55:16 UTC

Invalid SSL certificate

You

Browser

Working
Newark

Cloudflare

Working
deliverybot.acm.org

Host

Error

What happened?

The origin web server does not have a valid SSL certificate.

What can I do?

If you're a visitor of this website:

Please try again in a few minutes.

If you're the owner of this website:

The SSL certificate presented by the server did not pass validation. This could indicate an expired SSL certificate or a certificate that does not include the requested domain name. Please contact your hosting provider to ensure that an up-to-date and valid SSL certificate issued by a Certificate Authority is configured for this domain name on the origin server. Additional troubleshooting information here.

acmqueue

Originally published in Queue vol. 11, no. 5
see this item in the ACM Digital Library


Tweet



Related:

Adam Morrison - Scaling Synchronization in Multicore Programs
Advanced synchronization methods can boost the performance of multicore software.


Fabien Gaud, Baptiste Lepers, Justin Funston, Mohammad Dashti, Alexandra Fedorova, Vivien Quéma, Renaud Lachaize, Mark Roth - Challenges of Memory Management on Modern NUMA System
Optimizing NUMA systems applications with Carrefour


Spencer Rathbun - Parallel Processing with Promises
A simple method of writing a collaborative system


Davidlohr Bueso - Scalability Techniques for Practical Synchronization Primitives
Designing locking primitives with performance in mind



Comments

(newest first)

Samy Al Bahra | Wed, 29 Oct 2014 03:21:41 UTC

It appears there has been some misinformation spreading. The memory barrier requirement was referring to popular lock-based synchronization mechanisms and has nothing to do with the work stealing memory barrier example (where language used is "may" specifically because of the bounded nature of store buffers and invalidation queues).


Ajinkya | Fri, 24 Jan 2014 10:53:40 UTC

All I can say is, A complex topic very well explained. http://goo.gl/XhFtP


reader | Sun, 18 Aug 2013 00:27:09 UTC

Wondering about value of the x86 Fetch and Add Op rather than CAS to reduce contention costs.

"Consider, for example, the fetch-and-add (F&A) primitive. Figure 1 shows the difference in the time it takes a thread to increment a contended counter on a modern x86 system when using F&A vs. a CAS loop. Avoiding the retries and paying only the synchronization price leads to a 46 performance improvement. In this 2013 paper we transfer this insight to the domain of FIFO queues, henceforth simply queues"

http://www.cs.tau.ac.il/~adamx/ppopp2013-x86queues.pdf

Lightweight Contention Management for Effcient Compare-and-Swap Operations 2013 http://arxiv.org/pdf/1305.5800.pdf

An Optimal Implementation of Fetch-and-Increment 2013 http://www.ics.forth.gr/carv/transform/srdc/_docs/Faith%20Ellen.pdf

Pragmatic Primitives for Non-blocking Data Structures (PODC 2013) http://www.cse.yorku.ca/~ruppert/talks/srdc-2013.pdf


Leave this field empty

Post a Comment:







© 2018 ACM, Inc. All Rights Reserved.